Types.hs (1461B)
1 {-# OPTIONS_HADDOCK prune #-} 2 3 -- | 4 -- Module: Vestigia.Contract.Types 5 -- Copyright: (c) 2026 Jared Tobin 6 -- License: MIT 7 -- Maintainer: Jared Tobin <jared@ppad.tech> 8 -- 9 -- What a contract's table says of an AArch64 encoding. 10 11 module Vestigia.Contract.Types ( 12 Operand(..) 13 , Status(..) 14 , Encoding(..) 15 ) where 16 17 import qualified Data.Text as T 18 import Data.Word (Word32) 19 20 -- | A source register an encoding names, by the field it is read 21 -- from: a general-purpose register at 64 or 32 bits (field value 22 -- 31 the zero register, or the stack pointer where the encoding 23 -- says so), a SIMD&FP register at a fixed width, a vector whose 24 -- width is the encoding's Q bit (bit 30), or a SIMD&FP register 25 -- read whole where nothing fixes its width. 26 data Operand = 27 OpX 28 | OpXSp 29 | OpW 30 | OpWSp 31 | OpQ 32 | OpD 33 | OpS 34 | OpH 35 | OpB 36 | OpV 37 | OpVWhole 38 deriving (Eq, Show) 39 40 -- | An encoding the contract covers; one it does not that is control 41 -- flow or system, which reads no data the contract speaks to; or one 42 -- it does not, with its source registers, each by the low bit of its 43 -- field. 44 data Status = 45 Covered 46 | Control 47 | Outside ![(Int, Operand)] 48 deriving (Eq, Show) 49 50 -- | An encoding, by its name in the specification, its fixed bits, 51 -- and what the contract says of it. 52 data Encoding = Encoding { 53 enName :: !T.Text 54 , enMask :: !Word32 55 , enValue :: !Word32 56 , enStatus :: !Status 57 } deriving (Eq, Show)